Home » M.Tech in NS3 Simulation M.Tech in NS3 Simulation M.Tech in NS3 Simulation Regression Testing of GPU/MIC Systems for HPCC -M.Tech in NS3 Simulation A Reliable Distributed Convolutional Neural Network for Biology Image Segmentation-M.Tech in NS3 Simulation Multiarea Distribution System State Estimation-M.Tech in NS3 Simulation Investigation of Maximum Possible OPF Problem Decomposition Degree for Decentralized Energy Markets-M.Tech in NS3 Simulation Interoperable job execution and data access through UNICORE and the Global Federated File System-M.Tech in NS3 Simulation Design strategies for the application server architecture/configuration (and its functions) in next-generation communication systems-M.Tech in NS3 Simulation 3D Cartesian Transport Sweep for Massively Parallel Architectures with PaRSEC-M.Tech in NS3 Simulation A platform for real-time fault-tolerant distributed control of replica-determinate inverters-M.Tech in NS3 Simulation A Partial PIC Based Receiver Design for SFBC-OFDM Cooperative Relay Systems-M.Tech in NS3 Simulation SparkSW: Scalable Distributed Computing System for Large-Scale Biological Sequence Alignment-M.Tech in NS3 Simulation On fast timing closure: speeding up incremental path-based timing analysis with mapreduce-M.Tech in NS3 Simulation Divisible Load Scheduling in Mobile Grid Based on Stackelberg Pricing Game-M.Tech in NS3 Simulation A Scalable Distributed Private Stream Search System-M.Tech in NS3 Simulation Using of a table method of simplification of polynomial equation systems-M.Tech in NS3 Simulation Stabilization of a Cascaded DC Converter System via Adding a Virtual Adaptive Parallel Impedance to the Input of the Load Converter-M.Tech in NS3 Simulation Vroom: Faster Build Processes for Java-M.Tech in NS3 Simulation A parallel out-of-core algorithm for the time-domain adaptive integral method-M.Tech in NS3 Simulation A Comment on “Fast Bloom Filters and Their Generalization”-M.Tech in NS3 Simulation Parallel and High-Speed Computations of Elliptic Curve Cryptography Using Hybrid-Double Multipliers-M.Tech in NS3 Simulation Verifying Pipelined-RAM Consistency over Read/Write Traces of Data Replicas-M.Tech in NS3 Simulation In-Place Matrix Transposition on GPUs-M.Tech in NS3 Simulation Heterogeneous NoC Router Architecture-M.Tech in NS3 Simulation Accelerating LINPACK with MPI-OpenCL on Clusters of Multi-GPU Nodes-M.Tech in NS3 Simulation Swap-And-Randomize: A Method for Building Low-Latency HPC Interconnects-M.Tech in NS3 Simulation A performance study of CUDA UVM vs. manual optimizations in a real-world setup: Application to a Monte Carlo wave-particle event-based interaction model-M.Tech in NS3 Simulation 2015 IEEE M.Tech in NS3 simulation
